This invention is directed to fully planar bipolar transistors including gallium arsenide heterojunction transistors and methods for forming the same and to the use of these transistors in integrated circuit devices.
Since the invention of the transistor refinements have been continually made to reduce both its size and to increase its speed of operation. For many years silicon has been the element of choice utilized to construct transistors and IC devices. Recently silicon based logic gates have been demonstrated having sub-nanosecond speeds down to about 100 picoseconds.
Gallium arsenide was suggested as a potential transistor material long prior to the development of technology allowing the use of gallium arsenide as an actual transistor material. With the advent of liquid phase epitaxy it became possible to construct gallium arsenide transistors. However, since this technology had limitations inherent therein, advances in gallium arsenide transistors lagged behind those being made in silicon base devices.
Heterojunction transistors were also suggested not long after the advent of the transistor. As with gallium arsenide transistors, again the transformation of theory to practical heterojunction transistors has been inhibited by the lack of practical methods for constructing such heterojunction transistors.
Two technologies have emerged which allow for the preparation of both gallium arsenide and heterojunction transistors. These are molecular beam epitaxy, hereinafter referred to as MBE and metal-organic chemical vapor deposition, hereinafter referred to as MOCVD. These two techniques allow the fabrication of gallium arsenide devices and certain heterojunction devices.
In MBE a wafer of a substrate is placed in a reactor which comprises a vacuum chamber. Elements to be deposited upon the wafer are heated to vaporize them and under the control of a mechanical shutter they are released toward the wafer. The vaporized atoms land on the substrate and arrange themselves in an epitaxial layer growning on the substrate. Doping is done by introducing dopant atoms also as a vapor.
As opposed to MBE, in MOCVD generation of a high vacuum is not necessary. In this technique organometallics and hydrides are utilized as carrier molecules and are introduced as gasses into a reaction chamber. Within the chamber the gasses contact a substrate. Atoms are deposited by the gasses onto the substrate to epitaxially grow the desired layers thereon.
Gallium arsenide based logic appears to have an inherent speed advantage of approximately 2 to 5 over silicon base logic. This has led to the development of certain gallium arsenide devices, most particular gallium arsenide FET's, i.e., field effect transistors.
Heterojunction gallium arsenide devices hold the promise of even higher speeds than gallium arsenide devices. Gallium arsenide heterojunction FET's have been demonstrated. Additionally, in order to achieve faster switching speeds, both high electron mobility transistors (HEMT) and certain heterojunction bipolar transistors have been constructed. Both of these devices have the theoretical potential for switching speeds below 20 picoseconds at reasonable low power levels and each only requires optical photolithography in order to build the devices.
Contrary to the heterojunction bipolar devices, the HEMT devices must be cooled to below about 100 K. to achieve optimum performance. Because of this cooling requirement these HEMT devices are not suitable in many environments.
Because of their potential speed and ability to operate at room temperature or higher, bipolar gallium arsenide and bipolar heterojunction gallium arsenide devices are desirable. A further advantage of such bipolar devices is that they can utilize existing libraries of circuit designs which have been developed for emitter couple logic (ECL) or current mode logic (CML) silicon bipolar devices.
Kroemer in a paper H. Kroemer, Proceedings of the IEEE, Volume 70, Number 1, January 1982, suggested a heterojunction gallium arsenide device which utilized an inverted emitter architecture. In this device base and collector contacts are placed on one side of a substrate with the emitter placed on the opposite side of the substrate such that it is inverted with respect to the base and collector contacts. However, since the emitter contact is on the opposite side of the substrate from the base and collector contacts this architecture is not applicable to many circuit layouts.
A further heterojunction bipolar gallium arsenide transistor is known which utilizes a normal emitter upright structure. However, in this structure the base layer is continuous across the structure having been formed by epitaxy and is so heavy doped that it cannot be over compensated to enable contacts to be brought to the surface. This, thus requires vias to be formed in the structure. Since via etching is preferential these vias must be oriented at a specific crystalographic direction and generally have retrograded sides. Further, the vias are deep with respect to the dimensions of the individual layers of the device. In view of this, subsequent metallization of the collector contact is difficult, and leads to reduction in the yields of these devices.